Placement Papers: Hughes 2004

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Source: Iit k (this paper is got from rookee and same is given in iitk)

Dated: /04

section A 30m (Compulsary)

section B or C 20 m (changed) m

Attempt either B or C sec B contains CST


Better to attempt Electronics paper

(Those who are having electronics background)


  1. Which of the folowing is not correct
  2. Question on logic ckt. U have to find the output
  3. Output of MUX
  4. If X and Y are two sets. | X|and|Y | are corresponding coordinates and exact no. Of functions from X to Y is 97 then
  5. If two dies are thrown simultaneously what is the prob. Of one of the dice getting face 6?
  6. The relation, < on reals is
  7. In C language the parameters are passsed by
  8. Advantage of SRAM over DRAM
  9. Diasy chaining related question (refer Z80)
  10. RAM chips arranged in 4X6 array and of 8kX4bit capacity each. How many address lines reqd. To access each byte
  11. Question related to AVL trees regarding how many no. Of nodes to be changed to become balanced after addition of a leaf node to a particular node.
  12. When following sequence is insertedin the binary search tree no. Of nodes in left and right subtrees
  13. Method used for Disk searching is
    1. linked list
    2. AVL
    3. B-tree
    4. binary tree
  14. Which of the following is correct statement.
  15. AX = B where A is mXn, b&X are column matrices of order m
  16. The option avialable in C ++ , not C:
  17. int a [4] = {1,2, 3,4} ; int ⚹ ptr; ptr = a; ⚹ (a + 3) =⚹ (++ ptr) + (⚹ ptr ++) ; A part of code is shown. The elements in A after the execution of this code.
  18. Critical section program segment is
  19. when head is moving back and forth, the disk scheduling algorithm is ________
  20. how many times the loop will execute LOOP LXI B, 1526H DCX B JNZ LOOP
  21. the addressing mode in which the address of the operand is expressed explicitly within the instruction
    1. index addressing
    2. absolute
    3. indirect
    4. immediate
  22. (A B) U (B A) U (AC) = ? where A, B are two sets A ‘B’ are compliments of A and B
  23. the network that does not use virtual circuit
  24. source routing bridge
  25. A chocolate block is of 4 X 4 size. How many cuts are needed to make 1 X 1 size blocks. No simultaneous vert. & horz. Cuts.
  26. cache access time 100 msec. Main memory access time 800 msec if the hit ratio is 95 % , what is mean access time …
  27. the module that should be always reside in main memory is
  28. The order of algorithm to merge the two sorted lists of lengths m and n is
    1. O (m)
    2. O (n)
    3. O (m + n)
    4. O (log (m) + log (n) )

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