Basic CS [3i Infotech Placement]: Sample Questions 74 - 76 of 243

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Question 74

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Describe in Detail

Essay▾

In an AVL tree, at what condition balancing is done?

Explanation

  • In an AVL tree, if the balance height is greater than 1 or less than 1 balancing is done.
  • AVL tree is a self-balancing binary search tree.
  • The balance height of left and right sub trees cannot be more than one for all nodes.

AVL Rotations

Left rotation

The Left Rotation

Right rotation

The Right Rotation

Left-Right rotation

Left-Right Rotation

Right-Left rotation

Right-Left Rotation

Question 75

Basic CS

Question

MCQ▾

For MB memory, the number of address lines required is?

Choices

Choice (4)

a.

24

b.

22

c.

11

d.

20

Answer

d.

Explanation

  • is memory in bytes accessible using n lines (for byte addressable memory)
  • In the questions bytes

  • So, the number of address line required is .

Question 76

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Describe in Detail

Essay▾

What is the translation look aside Buffer?

Explanation

Understanding of Translation Look-Aside Buffers
  • Every time the CPU accesses virtual memory, a virtual address translated to the corresponding physical address.
  • Page table contains translations from virtual address to physical address.
  • TLB is a hardware cache that stores recent translation of virtual memory to physical addresses for faster retrieval- part of the chip՚s memory management unit.
  • TLB can reside between the CPU and the CPU cache, between CPU cache and the main memory or between different levels of the multi-level cache.
  • Present inside memory management hardware- in processor that utilizes paged or segment virtual memory.
  • Without TLB every virtual memory reference will cause 2 physical memory accesses one to fetch appropriate page table entry, and fetch the desired data.

Cache Thrash

  • Transaction look aside buffer suffers performance issues from multitasking and code errors.
  • Performance degradation is called a cache thrash.

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