Basic CS-Operating System (TCS Papers): Sample Questions 1 - 2 of 35

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Question number: 1

» Basic CS » Operating System

Essay Question▾

Describe in Detail

How many types of generations are there in a garbage collector?

Explanation

Memory management in the CLR is divided into three generations that are build up by grouping memory segments. Generations enhance the garbage collection performance:

  • Generation 0 - When an object is initialized, it is said to be in generation 0.

  • Generation 1 - Objects under garbage collection process are considered to be in generation 1.

  • Generation 2 - New objects created and added to the memory are added to generation 0 and the old objects in generation 1 are considered to be in generation 2.

Question number: 2

» Basic CS » Operating System

Essay Question▾

Describe in Detail

What is cycle stealing?

Explanation

  • We encounter cycle stealing in the context of Direct Memory Access (DMA).

  • Either the DMA controller can use the data bus when the CPU does not need it, or it may force the CPU to temporarily suspend operation- this is technique is called cycle stealing.

  • That cycle stealing can be done only at specific break points in an instruction cycle.

  • Cycle stealing is a method of accessing computer memory (RAM) or bus without interfering with the CPU.

  • It is similar to direct memory access (DMA) for allowing I/O controllers to read or write RAM without CPU intervention.

  • Clever exploitation of specific CPU or bus timings can permit the CPU to run at full speed without any delay if external devices access memory not actively participating in the CPU’s current activity and complete the operations before any possible CPU conflict.

  • Requests by DMA devices for using the bus are always given higher priority than processor requests.

  • Among different DMA devices, top priority is given to high-speed peripherals.

  • Since the processor originates most memory access cycles, it is often stated that DMA steals memory cycles from the processor.

  • If DMA controller is given exclusive access to the main memory to transfer a block of data without interruption, this is called block or burst mode.

Image of The Cycle steal mode

Image of the Cycle Steal Mode

Given the image is defining the cycle steal mode